Design, Implementation, and Verification of DySER for Dynamic Specialization in General Purpose Processors

dc.contributor.advisorSankaralingam, Karthikeyan
dc.contributor.authorBenson, Jesse
dc.date.accessioned2011-07-11T18:47:39Z
dc.date.available2011-07-11T18:47:39Z
dc.date.issued2011-05-15
dc.description.abstractThe Dynamically Synthesized Execution (DySE) model is an execution model to improve the energy efficiency and performance of general purpose programmable processors through dynamic specialization. The purpose of this project was to develop a prototype implementation of a DySE Resource (DySER) to demonstrate the viability of the design. A scalable DySER block was developed and integrated into the OpenSPARC T1 pipeline. The modified processor was synthesized onto a Virtex-5 FPGA and can execute application binaries created with our co-designed compiler. This paper provides an overview of the DySE Resource (DySER) design, hardware and compiler implementations, verification, and design analysis. Performance analysis shows speed-up can be achieved for programs that execute in phases or that contain ample computation reuse.en
dc.identifier.urihttp://digital.library.wisc.edu/1793/53727
dc.titleDesign, Implementation, and Verification of DySER for Dynamic Specialization in General Purpose Processorsen
dc.typeProject Reporten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.levelMSen

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