A Hardware-in-the-Loop Platform for DC Protection

dc.contributor.advisorRobert M. Cuzner
dc.contributor.committeememberBrian S.R. Armstrong
dc.contributor.committeememberTian Zhao
dc.creatorVygoder, Mark
dc.date.accessioned2025-01-16T18:26:44Z
dc.date.available2025-01-16T18:26:44Z
dc.date.issued2020-05-01
dc.description.abstractWith the proliferation of power electronics, dc-based power distribution systems can be realized; however, dc electrical protection remains a significant barrier to mass implementation dc power distribution. Controller Hardware-in-the-loop (CHiL) simulation enables moving up technology readiness levels (TRL) quickly. This work presents an end-to-end solution for dc protection CHiL for early design exploration and verification for dc protection, allowing for the rapid development of dc protection schemes for both Line-to-Line (LL) and Line-to-Ground (LG) faults. The approach combines using Latency Based Linear Multistep Compound (LB-LMC), a real-time simulation method for power electronic, and National Instruments (NI) FPGA hardware to enable dc protection design with CHiL. A case study is performed for a 1.5 MW Voltage Source Rectifier (VSR) under LL and LG faults in an ungrounded system. The deficiency in real-time simulation resolution of Commercial-off-the-Shelf (COTS) for dc fault transients is shown, and addressed by using LB-LMC RT solver inside NI FPGA hardware to achieve 50 ns resolution of dc fault transients.
dc.identifier.urihttp://digital.library.wisc.edu/1793/86860
dc.relation.replaceshttps://dc.uwm.edu/etd/2433
dc.subjectController Hardware-in-the-Loop
dc.subjectdc protection
dc.subjectfault protection
dc.subjectHardware-in-the-Loop
dc.subjectPower Electronics
dc.subjectreal-time simulation
dc.titleA Hardware-in-the-Loop Platform for DC Protection
dc.typethesis
thesis.degree.disciplineEngineering
thesis.degree.grantorUniversity of Wisconsin-Milwaukee
thesis.degree.nameMaster of Science

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