Accelerating Exact Logic Synthesis Using Parallel Computing Methods

dc.contributor.advisor	Ernst, Beth K.
dc.contributor.advisor	Ernst, Daniel J.
dc.contributor.author	Ott, Austen
dc.contributor.author	Zimmer, Benjamin
dc.date.accessioned	2011-12-16T17:01:25Z
dc.date.available	2011-12-16T17:01:25Z
dc.date.issued	2011-05
dc.description	Color poster with text, diagrams, and graphs.	en
dc.description.abstract	Exact synthesis is the process of creating a minimal-cost representation of a logic function. These representations are used in the design of microprocessors and other digital devices. An existing exact synthesis program was modified to utilize the combined computing power of multiple or supercomputers with the goal of speeding up the process. A working parallel version was created using the OpenMPI library, which demonstrates a significant speeding up of the process.	en
dc.description.sponsorship	University of Wisconsin--Eau Claire Office of Research and Sponsored Programs	en
dc.identifier.uri	http://digital.library.wisc.edu/1793/55569
dc.language.iso	en_US	en
dc.relation.ispartofseries	USGZE AS589	en
dc.subject	Logic design--Data processing	en
dc.subject	Multiprocessors	en
dc.subject	Process control--Computer programs	en
dc.subject	Parallel programming (Computer science)	en
dc.subject	Posters	en
dc.title	Accelerating Exact Logic Synthesis Using Parallel Computing Methods	en
dc.type	Presentation	en

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