Intelligent Routing Using Network Processors: Guiding Design Through Analysis

Abstract

The explosive growth of Internet traffic and the increasing complexity of the functions peformed by network nodes have given rise to a new breed of programmable microprocessors called network processors. A major hurdle in designing these processors is a lack of understanding of their workload characteristics. Dearth of literature tackling specific architectural issues has also resulted in an unclear understanding of the design space of these processors. We provide a comprehensive survey of ideas and features employed by current network processor designs. We also explore the contribution of academia in this area. Lastly, as an initial exploration of this large design space, we analyze packet traces from different sources and show that caching can be gainfully employed to enhance performance for routing table lookup functions in network processors.