A Case for Deconstructing Hardware Transactional Memory Systems

dc.contributor.authorHill, Mark D.en_US
dc.contributor.authorHower, Dereken_US
dc.contributor.authorMoore, Keven E.en_US
dc.contributor.authorSwift, Michael M.en_US
dc.contributor.authorVolos, Harisen_US
dc.contributor.authorWood, David A.en_US
dc.date.accessioned2012-03-15T17:21:41Z
dc.date.available2012-03-15T17:21:41Z
dc.date.created2007en_US
dc.date.issued2007en_US
dc.description.abstractMajor hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstructing transactional memory into separate, interchangeable components facilitates TM adoption in two ways. First, it aids hardware TM refinement, allowing vendors to adopt TM earlier, knowing that they can more easily refine aspects later. Second, it enables the components to be applied to other uses, including reliability, security, performance, and correctness, providing value even if TM is not widely used. We develop some evidence for our thesis via experience with LogTM variants and preliminary case studies of scalable watch-points and race recording for deterministic replay.en_US
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationTR1594en_US
dc.identifier.urihttp://digital.library.wisc.edu/1793/60556
dc.publisherUniversity of Wisconsin-Madison Department of Computer Sciencesen_US
dc.titleA Case for Deconstructing Hardware Transactional Memory Systemsen_US
dc.typeTechnical Reporten_US

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