Timing False Path Identification using ATPG Techniques
| dc.contributor.advisor | Davoodi, Azadeh | |
| dc.contributor.author | Parnerkar, Shreyas Vijay | |
| dc.date.accessioned | 2010-08-20T14:50:23Z | |
| dc.date.available | 2010-08-20T14:50:23Z | |
| dc.date.issued | 2010-08-20 | |
| dc.description.abstract | A Project Report submitted to the University of Wisconsin -- Department of Electrical and Computer Engineering in partial fulfillment of the requirements for the degree of Master of Science Graduate Program in Electrical and Computer Engineering. | en |
| dc.identifier.uri | http://digital.library.wisc.edu/1793/46187 | |
| dc.title | Timing False Path Identification using ATPG Techniques | en |
| dc.type | Project Report | en |
| thesis.degree.discipline | Electrical Engineering | en |
| thesis.degree.level | MS | en |
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