Hardware Architecture for Recursive Virtual Machines

Abstract

In order to support Virtual Machine (VM) Systems on most current computer systems, the Virtual Machine Monitor (VMM) is the only process allowed to reference directly a set of registers, called resource management registers (RMR). Any access operations to those registers executed by any other processes (i.e. processes running on VMs) must be detected and executed interpretively by the VMM. This way of implementing VMs is imposed by inadequate hardware mechanism for protection. In this paper, this problem is studied and a hardware architecture is proposed to solve this problem in an efficient and elegant way. The hardware architecture proposed is a stack of RMR, one for each level of VM. The processes running on a VM can only access the RMRs of their level. The hardware (Cgntrol Unit) will use the information stored in the RMR of the current level and in the RMRs of lower levels for resource mapping.